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NOTES

DMA + Dual Core — Two Cores: Core0 Acquires, Core1 Processes

ESP32-S3 has two cores. This architecture pins acquisition to Core0 and processing to Core1, combined with DMA for maximum throughput.

Intuition

Two-Core Division

Core 0 ─── DMA + acquisition (interrupt-driven)
        double-buffer switch
Core 1 ─── data processing + threshold detection + MQTT output

The two cores don't interfere:

  • Core0 only acquires: DMA interrupt → buffer switch → continue
  • Core1 only processes: read Core0's buffer → feature extraction → threshold → output

Why Not One Core?

On one core, acquisition and processing are serialized: sample a bit, compute a bit, sample a bit. Heavy computation causes jitter in sampling intervals, hurting timing precision.

Dual-core parallelizes acquisition and processing. Core0's sampling timing is completely unaffected by Core1's processing load.

Data Flow

Core0 (acquisition):
    DMA interrupt → buffer switch → notify Core1

Core1 (processing):
    wait for notification → read buffer → features → threshold → output

Config

#define TINY_MEASUREMENT_RT_DMA_DC_BUFFER_SIZE 256
#define TINY_MEASUREMENT_RT_DMA_DC_PRODUCER_CORE 0
#define TINY_MEASUREMENT_RT_DMA_DC_CONSUMER_CORE 1

Notes

When to use Dual Core?

When the other two architectures still drop samples. This is the highest-throughput option on ESP32-S3.

Careful with resource allocation

WiFi/BLE tasks on Core1 may compete with processing. Dedicate Core1 to processing only; leave network tasks to Core0.